https://scholars.lib.ntu.edu.tw/handle/123456789/359401
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | H.-H. Chuang | en_US |
dc.contributor.author | C.-J. Hsu | en_US |
dc.contributor.author | J. Hong | en_US |
dc.contributor.author | C.-H. Yu | en_US |
dc.contributor.author | A. Cheng | en_US |
dc.contributor.author | J. Ku | en_US |
dc.contributor.author | T.-L. Wu | en_US |
dc.contributor.author | TZONG-LIN WU | zz |
dc.creator | H.-H. Chuang;C.-J. Hsu;J. Hong;C.-H. Yu;A. Cheng;J. Ku;T.-L. Wu | - |
dc.date.accessioned | 2018-09-10T08:18:39Z | - |
dc.date.available | 2018-09-10T08:18:39Z | - |
dc.date.issued | 2010-02 | - |
dc.identifier.uri | http://scholars.lib.ntu.edu.tw/handle/123456789/359401 | - |
dc.language | en | en |
dc.relation.ispartof | IEEE Transactions on Electromagnetic Compatibility | en_US |
dc.source | AH-anncc | - |
dc.title | A broadband chip-level power-bus model feasible for power integrity chip-package co-design in high-speed memory circuits | - |
dc.type | journal article | en |
dc.identifier.doi | 10.1109/TEMC.2009.2035614 | - |
dc.identifier.scopus | 2-s2.0-77249150378 | - |
dc.identifier.isi | WOS:000274730800027 | - |
dc.relation.pages | 235-239 | - |
dc.relation.journalvolume | 52 | - |
dc.relation.journalissue | 1 | - |
item.openairetype | journal article | - |
item.fulltext | no fulltext | - |
item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
item.grantfulltext | none | - |
item.cerifentitytype | Publications | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Communication Engineering | - |
crisitem.author.orcid | 0000-0002-3560-8898 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
顯示於: | 電機工程學系 |
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