https://scholars.lib.ntu.edu.tw/handle/123456789/498206
標題: | A build-in self-test technique for RF low-noise amplifiers | 作者: | Huang, Y.-C. Hsieh, H.-H. LIANG-HUNG LU |
關鍵字: | Amplitude detectors; Built-in self-test (BIST); Logarithmic amplifiers; Low-noise amplifiers (LNAs); RF testing | 公開日期: | 2008 | 卷: | 56 | 期: | 5 | 起(迄)頁: | 1035-1042 | 來源出版物: | IEEE Transactions on Microwave Theory and Techniques | 摘要: | A built-in self-test (BIST) technique suitable for RF low-noise amplifiers (LNAs) is presented in this paper. With fully integrated amplitude detectors and logarithmic amplifiers, the BIST module can be employed as a generic platform for gain extraction of the device-under-test (DUT) without expensive testing instruments, while maintaining a reasonable hardware overhead and minimum loading effects to the DUT. Using a 0.18-μ m CMOS process, a 5-GHz variable-gain LNA with the proposed BIST module is implemented. Based on the experimental results, on-chip gain extraction of the LNA has been demonstrated with an error less than 1 dB for various gain modes. The additional chip area required for the BIST functionality measures 0.042 mm2, which is considerably small compared with the physical size of the RF amplifiers. © 2006 IEEE. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/498206 https://www.scopus.com/inward/record.uri?eid=2-s2.0-44049093635&doi=10.1109%2fTMTT.2008.921293&partnerID=40&md5=c81b992574c2d6b552d8e6f0428ad7d9 |
ISSN: | 00189480 | DOI: | 10.1109/TMTT.2008.921293 | SDG/關鍵字: | CMOS integrated circuits; Computer hardware; Gain control; Logarithmic amplifiers; Low noise amplifiers; Amplitude detectors; Device-under-test (DUT); RF testing; Built-in self test |
顯示於: | 電機工程學系 |
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