https://scholars.lib.ntu.edu.tw/handle/123456789/500910
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, Ing-Yi | en_US |
dc.contributor.author | Chen, Geng-Lin | en_US |
dc.contributor.author | Kuo, Sy-Yen | en_US |
dc.contributor.author | SY-YEN KUO | zz |
dc.creator | Chen, Ing-Yi;Chen, Geng-Lin;Kuo, Sy-Yen | - |
dc.date.accessioned | 2020-06-11T06:44:51Z | - |
dc.date.available | 2020-06-11T06:44:51Z | - |
dc.date.issued | 1995 | - |
dc.identifier.uri | https://scholars.lib.ntu.edu.tw/handle/123456789/500910 | - |
dc.relation.ispartof | 1995 European Design and Test Conference, ED&TC 1995, Paris, France, March 6-9, 1995 | - |
dc.title | Delay models for the sea-of-wires array synthesis system. | en_US |
dc.type | conference paper | en |
dc.identifier.doi | 10.1109/EDTC.1995.470398 | - |
dc.identifier.url | https://doi.org/10.1109/EDTC.1995.470398 | - |
dc.relation.pages | 228-233 | - |
item.openairecristype | http://purl.org/coar/resource_type/c_5794 | - |
item.openairetype | conference paper | - |
item.grantfulltext | none | - |
item.cerifentitytype | Publications | - |
item.fulltext | no fulltext | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.dept | Networking and Multimedia | - |
crisitem.author.dept | Computer Science and Information Engineering | - |
crisitem.author.dept | Center for Quantum Science and Engineering (CQSE) | - |
crisitem.author.orcid | 0000-0002-2504-2608 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | Others: University-Level Research Centers | - |
顯示於: | 電機工程學系 |
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