https://scholars.lib.ntu.edu.tw/handle/123456789/501721
Title: | Fully-integrated 40-Gb/s pulse pattern generator and bit-error-rate tester chipsets in 65-nm CMOS technology | Authors: | Chen, G.-S. Wu, C.-Y. Lin, C.-L. Hung, H.-W. Lee, J. JRI LEE |
Issue Date: | 2015 | Start page/Pages: | 109-112 | Source: | Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 | URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/501721 | DOI: | 10.1109/ASSCC.2014.7008872 |
Appears in Collections: | 電機工程學系 |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.