https://scholars.lib.ntu.edu.tw/handle/123456789/516608
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | M.-L. Fan | en_US |
dc.contributor.author | P. Su | en_US |
dc.contributor.author | C.-T. Chuang | en_US |
dc.contributor.author | VITA PI-HO HU | en_US |
dc.creator | V. P.-H. Hu;M.-L. Fan;P. Su;C.-T. Chuang | - |
dc.date.accessioned | 2020-10-07T01:23:19Z | - |
dc.date.available | 2020-10-07T01:23:19Z | - |
dc.date.issued | 2011 | - |
dc.identifier.issn | 21563357 | - |
dc.identifier.uri | https://scholars.lib.ntu.edu.tw/handle/123456789/516608 | - |
dc.identifier.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-81255127207&doi=10.1109%2fJETCAS.2011.2163691&partnerID=40&md5=36aee8ea77aa17e4f1e6c765b706025f | - |
dc.description.abstract | This paper analyzes stability and variability of ultra-thin-body (UTB) SOI subthreshold SRAMs considering line-edge roughness (LER), work function variation (WFV), and temperature sensitivity. The intrinsic advantages of UTB SOI technology versus bulk CMOS technology with regard to the stability and variability of 6T SRAM cells for subthreshold operation are analyzed. Compared with LER, WFV causes comparable threshold voltage variation and much smaller subthreshold swing fluctuation, hence less impact on the UTB SOI subthreshold SRAMs. Even considering LER, the Lg=40nm UTB SOI 6T subthreshold SRAM cells still provide sufficient margin (μRSNM/σRSNM>6 at Vdd=0.3∼ 0.4 V) while the bulk subthreshold SRAMs with RDF fail to maintain adequate margin. Increasing temperature will increase the Vread,0 and decrease RSNM because of the degraded subthreshold swing. The RSNM of UTB SOI subthreshold SRAMs show less temperature sensitivity compared with that of bulk subthreshold SRAMs. Due to larger body effect, the back-gating technique is more efficient for the Lg=40nm and 25 nm UTB SOI subthreshold SRAMs compared with the bulk counterparts. By using lower threshold voltage devices with dual band-gap work functions, the Lg=25 nm UTB SOI subthreshold SRAMs show 31.9% reduction in σRSNM and 55% improvement in μRSNM/σRSNM. © 2011 IEEE. | - |
dc.relation.ispartof | IEEE Journal on Emerging and Selected Topics in Circuits and Systems | - |
dc.subject | Static noise margin; subthreshold SRAM; ultra-thin-body SOI; variability | - |
dc.subject.other | 6T-SRAM; Band gaps; Body effect; Bulk CMOS; Bulk counterpart; Function variation; Line Edge Roughness; SOI technology; Static noise margin; Sub-threshold SRAM; Subthreshold; Subthreshold operation; Subthreshold swing; Temperature sensitivity; Threshold voltage variation; Ultra-thin-body; variability; CMOS integrated circuits; Roughness measurement; Sensitivity analysis; Threshold voltage; Work function; Static random access storage | - |
dc.title | Analysis of Ultra-Thin-Body SOI Subthreshold SRAM Considering Line-Edge Roughness, Work Function Variation, and Temperature Sensitivity | en_US |
dc.type | journal article | en |
dc.identifier.doi | 10.1109/jetcas.2011.2163691 | - |
dc.identifier.scopus | 2-s2.0-81255127207 | - |
dc.relation.pages | 335-342 | - |
dc.relation.journalvolume | 1 | - |
dc.relation.journalissue | 3 | - |
item.fulltext | no fulltext | - |
item.grantfulltext | none | - |
item.openairetype | journal article | - |
item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
item.cerifentitytype | Publications | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Program in Semiconductor Device, Material, and Hetero-integration | - |
crisitem.author.orcid | 0000-0002-6216-214X | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | Graduate School of Advanced Technology | - |
顯示於: | 電機工程學系 |
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