https://scholars.lib.ntu.edu.tw/handle/123456789/559177
標題: | Real-time Super Resolution CNN Accelerator with Constant Kernel Size Winograd Convolution | 作者: | Yen, P.-W. Lin, Y.-S. Chang, C.-Y. SHAO-YI CHIEN |
公開日期: | 2020 | 起(迄)頁: | 193-197 | 來源出版物: | Proceedings - 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020 | 摘要: | This paper presents a super-resolution CNN de-signed for real-time hardware processing and the associated hardware architecture. Previous networks typically contain numerous layers, various kernel sizes and deconvolution layers, making it hard for hardware implementation. In this paper, we present a CNN only consisting of 3×3 convolution, replacing the deconvolution by pixel shuffling. Such regularity of kernel size enables us to employ Winograd convolution to implement the whole network. The proposed architecture achieves output resolution of 1920×1080 (FHD) at 60 fps while working at a clock frequency of 200 MHz. It also outperforms other 12K-parameter networks in image quality. © 2020 IEEE. |
URI: | https://www.scopus.com/inward/record.url?eid=2-s2.0-85084973522&partnerID=40&md5=6d1fcf5056e5f0a71fa99139eec065be https://scholars.lib.ntu.edu.tw/handle/123456789/559177 |
DOI: | 10.1109/AICAS48895.2020.9073972 | SDG/關鍵字: | Artificial intelligence; Convolution; Optical resolving power; Silicon compounds; Clock frequency; Constant kernel; Hardware architecture; Hardware implementations; Kernel size; Proposed architectures; Real-time hardware; Super resolution; Network architecture |
顯示於: | 電機工程學系 |
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