Skip navigation
  • 中文
  • English

DSpace CRIS

  • DSpace logo
  • Home
  • Organizations
  • Researchers
  • Research Outputs
  • Explore by
    • Organizations
    • Researchers
    • Research Outputs
  • Academic & Publications
  • Sign in
  • 中文
  • English
  1. NTU Scholars
  2. 電機資訊學院
  3. 電子工程學研究所

電子工程學研究所 : [1559/3180] Collection home page

Subscribe to this collection to receive daily e-mail notification of new additions RSS Feed RSS Feed RSS Feed

Logo
Browse
Collection's Items (Sorted by Title in Ascending order): 1 to 20 of 3180
 next >
Issue DateTitleAuthor(s)SourcescopusWOSFulltext/Archive link
2017A 0.06mm2 ±50mV Range -82dB THD Chopper VCO-based Sensor Readout Circuit in 40nm CMOSC.-C. Tu; Y.-K. Wang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢IEEE Symposium on VLSI Circuits160
20010.24-μm CMOS technology and BSIM RF modeling for bluetooth power applicationsChen, Y.-J.E.; Heo, D.; Laskar, J.; Bien, D.; YI-JAN EMERY CHEN Microwave Journal 
2017A 0.3-V 7.6-fJ/conv-step delta-sigma time-to-digital converter with a gated-free ring oscillatorC.-K. Chang; Y.-K. Tsai; K.-H. Cheng; L.-H. Lu; LIANG-HUNG LU IEEE NEWCAS 201700
2018A 0.5-V 400-MHz Transceiver Using Injection-Locked Techniques in 180-nm CMOSC.-R. Lee; T.-W. Wang; Y.-L. Tsai; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢IEEE ICSICT00
2016A 0.5-V Sub-mW Energy-Efficient Receiver in 0.18-um CMOS for IoT ApplicationsT.-W. Wang; Y.-L. Tsai; C.-R. Lee; F.-L. Hung; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢IEEE ISOCC00
2009A 0.6 V low-power wide-range delay-locked loop in 0.18 ?m CMOSLu, Chung-Ting; Hsieh, Hsieh-Hung; Lu, Liang-Hung IEEE Microwave and Wireless Components Letters 
2017A 0.6-V 200-kbps 429-MHz Ultra-low-power FSK Transceiver in 90-nm CMOSC.-Y. Chiu; Z.-C. Zhang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢IEEE A-SSCC10
20070.6伏互補式金氧半導體類比電路之設計與實作魏軍浩; Wei, Chun-Hao
2017A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator with a Feedback-Assisted QuantizerC.-H. Weng; Y.-Y. Lin; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢IEEE Transactions on Circuits and Systems I78
20051-V 7-mW Dual-Band Fast-Locked Frequency SynthesizerVikas Sharma; Chien-Liang Chen; Charlie Chung-Ping Chen; CHUNG-PING CHEN GLSVLSI 80
20101.4μW/channel 16-channel EEG/ECoG Processor for Smart Brain Sensor SoCT.-C. Chen; T.-H. Lee; Y.-H. Chen; T.-C. Ma; T.-D. Chuang; C.-J. Chou; C.-H. Yang; T.-H. Lin; L.-G. Chen; LIANG-GEE CHEN ; TSUNG-HSIEN LIN IEEE Symposium on VLSI Circuits 140
2017A 1.5-GHz Sub-Sampling Fractional-N PLL for Spread-Spectrum Clock Generator in 0.18-μm CMOSC.-Y. Lin; T.-J. Wang; T.-H. Lin; TSUNG-HSIEN LIN ; 林宗賢IEEE A-SSCC20
2009A 10 GHz Phase-Locked Loop With a Compact Low-Pass Filter in 0.18 um CMOSLi, Sin-Jhih; Hsieh, Hsieh-Hung; Lu, Liang-Hung IEEE Microwave and Wireless Components Letters 
2017A 10-Gb/s Equalizer with Digital AdaptationJ-C Hsiao; T-C Lee; TAI-CHENG LEE International SoC Design Conference00
2005100 Mbs OOK transmitter with low power and low phase noise LC VCO for neurosensory applicationUpadhyaya, Parag; David, M.Rector; YI-JAN EMERY CHEN ; Rajashekharaiah, Mallesh; Heo, DeukhyounConference Proceedings - IEEE SOUTHEASTCON 50
2018A 10b 2.6GS/s Time-Interleaved SAR ADC with Background Timing-Skew CalibrationC-Y Lin; Y-H Wei; T-C Lee; TAI-CHENG LEE IEEE Journal of Solid-State Circuits280
200710GBase-T乙太網路系統晶片設計-子計畫一:經銅線傳輸之百億位元乙太網路系統晶片架構設計(2/3)曹恆偉
200810GBase-T乙太網路系統晶片設計-子計畫一:經銅線傳輸之百億位元乙太網路系統晶片架構設計(3/3)曹恆偉
200810GBase-T乙太網路系統晶片設計-子計畫三:適用於10GBase-T乙太網路接收機之類比前端電路(1/2)李泰成 
200810GBase-T乙太網路系統晶片設計-子計畫三:適用於10GBase-T乙太網路接收機之類比前端電路(2/2)李泰成 
Collection's Items (Sorted by Title in Ascending order): 1 to 20 of 3180
 next >

Discover

By people
  • 630 臺灣大學:電子工程學研究所
  • 327 臺灣大學: 電子工程學研究所
  • 275 國立臺灣大學電子工程學研究所
  • 266 臺灣大學:電子工程學研究所
  • 235 yao-wen chang
  • 234 電機資訊學院: 電子工程學研究所
  • 186 chang, y.-w.
  • 153 shao-yi chien
  • 150 chien, s.-y.
  • 117 tsung-hsien lin
  • . next >
By type
  • 1447 thesis
  • 910 conference paper
  • 461 journal article
  • 272 report
  • 49 patent
  • 21 book
  • 3 other
  • 2 patent

臺大位居世界頂尖大學之列,為永久珍藏及向國際展現本校豐碩的研究成果及學術能量,圖書館整合機構典藏(NTUR)與學術庫(AH)不同功能平台,成為臺大學術典藏NTU scholars。期能整合研究能量、促進交流合作、保存學術產出、推廣研究成果。

To permanently archive and promote researcher profiles and scholarly works, Library integrates the services of “NTU Repository” with “Academic Hub” to form NTU Scholars.

總館學科館員 (Main Library)
醫學圖書館學科館員 (Medical Library)
社會科學院辜振甫紀念圖書館學科館員 (Social Sciences Library)

開放取用是從使用者角度提升資訊取用性的社會運動,應用在學術研究上是透過將研究著作公開供使用者自由取閱,以促進學術傳播及因應期刊訂購費用逐年攀升。同時可加速研究發展、提升研究影響力,NTU Scholars即為本校的開放取用典藏(OA Archive)平台。(點選深入了解OA)

  • 請確認所上傳的全文是原創的內容,若該文件包含部分內容的版權非匯入者所有,或由第三方贊助與合作完成,請確認該版權所有者及第三方同意提供此授權。
    Please represent that the submission is your original work, and that you have the right to grant the rights to upload.
  • 若欲上傳已出版的全文電子檔,可使用Sherpa Romeo網站查詢,以確認出版單位之版權政策。
    Please use Sherpa Romeo to find a summary of permissions that are normally given as part of each publisher's copyright transfer agreement.
  • 網站簡介 (Quickstart Guide)
  • 使用手冊 (Instruction Manual)
  • 線上預約服務 (Booking Service)
  • 方案一:臺灣大學計算機中心帳號登入
    (With C&INC Email Account)
  • 方案二:ORCID帳號登入 (With ORCID)
  • 方案一:定期更新ORCID者,以ID匯入 (Search for identifier (ORCID))
  • 方案二:自行建檔 (Default mode Submission)
  • 方案三:學科館員協助匯入 (Email worklist to subject librarians)
Build with DSpace-CRIS - Extension maintained and optimized by Logo 4SCIENCE Feedback