https://scholars.lib.ntu.edu.tw/handle/123456789/632691
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Nie, Szu Ru | en_US |
dc.contributor.author | Chen, Yen Ting | en_US |
dc.contributor.author | YAO-WEN CHANG | en_US |
dc.date.accessioned | 2023-06-15T03:22:19Z | - |
dc.date.available | 2023-06-15T03:22:19Z | - |
dc.date.issued | 2022-07-10 | - |
dc.identifier.isbn | 9781450391429 | - |
dc.identifier.issn | 0738100X | - |
dc.identifier.uri | https://scholars.lib.ntu.edu.tw/handle/123456789/632691 | - |
dc.description.abstract | In modern VLSI designs, I/O counts have been growing continuously as the system becomes more complicated. To achieve higher routability, the hexagonal array is introduced with higher pad density and a larger pitch. However, the routing for hexagonal arrays is significantly different from that for traditional gird and staggered arrays. In this paper, we consider the Y-architecture-based flip-chip routing used for the hexagonal array. Unlike the conventional Manhattan and the X-architectures, the Y-architecture allows wires to be routed in three directions, namely, 0-, 60-, and 120-degrees. We first analyze the routing properties of the hexagonal array. Then, we propose a triangular tile model and a chord-based internal node division method that can handle both pre-assignment and free-assignment nets without wire crossing. Finally, we develop a novel dynamic programming-based bend minimization method to reduce the number of routing bends in the final solution. Experimental results show that our algorithm can achieve 100% routability with minimized total wirelength and the number of routing bends effectively. | en_US |
dc.relation.ispartof | Proceedings - Design Automation Conference | en_US |
dc.title | Y-architecture-based flip-chip routing with dynamic programming-based bend minimization | en_US |
dc.type | conference paper | en_US |
dc.identifier.doi | 10.1145/3489517.3530577 | - |
dc.identifier.scopus | 2-s2.0-85137445905 | - |
dc.identifier.url | https://api.elsevier.com/content/abstract/scopus_id/85137445905 | - |
dc.relation.pageend | 960 | en_US |
item.fulltext | no fulltext | - |
item.openairecristype | http://purl.org/coar/resource_type/c_5794 | - |
item.cerifentitytype | Publications | - |
item.openairetype | conference paper | - |
item.grantfulltext | none | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Computer Science and Information Engineering | - |
crisitem.author.dept | Center for Information and Electronics Technologies | - |
crisitem.author.dept | MediaTek-NTU Research Center | - |
crisitem.author.orcid | 0000-0002-0564-5719 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | Others: University-Level Research Centers | - |
crisitem.author.parentorg | Others: University-Level Research Centers | - |
顯示於: | 電信工程學研究所 |
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