https://scholars.lib.ntu.edu.tw/handle/123456789/98831
標題: | A WIP-based exception-management model for integrated circuit back-end production processes | 作者: | Guo, Ruey-Shan Chiang, David M. Pai, Fan-Yun |
關鍵字: | Integrated circuit manufacturing; On-time delivery; WIP determination; WIP management technology | 公開日期: | 2007 | 卷: | 33 | 期: | 44147 | 起(迄)頁: | 1263-1274 | 來源出版物: | International Journal of Advanced Manufacturing Technology | 摘要: | Meeting due dates for delivery of products is a key factor in achieving customer satisfaction in today's globally competitive semiconductor market. However, undesirable production variations are inevitable in this industry, especially for 'back-end' factories that are closer to customers. This makes it difficult for management to maintain (or improve) a factory's performance with respect to delivery on due dates. In practice, production managers ameliorate the adverse effects of manufacturing uncertainties by control of work in progress (WIP). The present study therefore proposes a WIP-exception management model to define, detect, and respond to WIP exceptions. First, a model for determining acceptable WIP deviation levels (AWDLs) is established to assist production managers in identifying WIP exceptions on monitored workstations. A correction mechanism is then proposed to adjust deviations in WIP levels ('WIP exceptions') in accordance with the projected AWDLs as soon as possible. A simulation model is constructed, and experiments are then conducted to evaluate the proposed model. The proposed model is confirmed as being able to set appropriate and effective WIP-exception conditions to trigger correction actions. The simulation experiment also demonstrates that the WIP-correction action can shorten the 'back-to-normal' duration, prolong the time between successive WIP exceptions, and improve average on-time delivery percentage. The study concludes that the proposed model does determine effective exception-triggering conditions, rectifies abnormal WIP levels promptly, and results in improved performance on due-date delivery for semiconductor 'back-end' factories. © 2006 Springer-Verlag London Limited. |
URI: | http://ntur.lib.ntu.edu.tw//handle/246246/83571 https://www.scopus.com/inward/record.uri?eid=2-s2.0-34547776812&doi=10.1007%2fs00170-006-0559-6&partnerID=40&md5=f26143c728cc45950a558b28635f6e4a |
ISSN: | 02683768 | DOI: | 10.1007/s00170-006-0559-6 | SDG/關鍵字: | Customer satisfaction; Industrial management; Integrated circuits; Mathematical models; Integrated circuit manufacturing; On-time delivery; WIP determination; WIP management technology; Production engineering |
顯示於: | 工商管理學系 |
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