JIUN-LANG HUANG
黃俊郎
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| Organization | Role |
Joint Professor | |
Professor | |
Director |
Web Site
Tel
+886-2-3366-3609
Email
jlhuang@ntu.edu.tw
ORCID
Scopus Author ID
Research Interests
VLSI System Design-for-Test
Fault tolerant design
Low power testing
Organization
| Organization | Major | Role | Start | End |
University of California，Santa Barbara | Ph.D. | January 1, 1996 | December 31, 1999 |
Organization
| Organization | Dept | Title | Start |
National Taiwan University | Graduate Institute of Electronics Engineering | Associate Professor | August 1, 2007 |
National Taiwan University | Program in Integrated Circuit Design and Automation | Director | February 1, 2022 |
Organization
| Organization | Dept | Title | Start | End |
National Taiwan University | Graduate Institute of Electronics Engineering | Assistant Professor | August 1, 2001 | August 1, 2007 |