工學院: 機械工程學研究所指導教授: 廖洺漢連慶Lien, ChinChinLien2017-03-132018-06-282017-03-132018-06-282015http://ntur.lib.ntu.edu.tw//handle/246246/278337本篇論文著重在III-V族化合物半導體材料砷化銦鎵(InGaAs)金屬-絕緣層-半導體(M-I-S)接觸系統之研究，隨著矽基元件逐漸面臨了其發展的瓶頸，III-V族化合物半導體因此被視為是下一個世代n型電晶體通道的替代材料。其原因主要是因為III-V族化合物擁有較高的電子遷移率以及較低的等效電子質量。然而像矽、鍺等材料一樣，III-V族化合物的金屬-半導體接面也有所謂費米能階釘紮(Fermi Level Pinning)的現象。近期，學者們提出在金屬與半導體之間嵌入一極薄的絕緣層(Insulator)，可以減緩費米能階釘紮，調變蕭特基能障(Schottky Barrier Height)，越低蕭特基能障可以獲得更低的接觸電阻，對於目前小線寬元件的效能，特別是在導通狀態時的電流，可以有大幅提升的機會。故M-I-S接觸系統亦是目前半導體領域正火熱的一個議題。第一部分我收集了目前M-I-S系統之發展進程，並列舉出一些不同種類半導體，如：矽、鍺與III-V族半導體以M-I-S接觸系統作為研究主軸的論文，對於M-I-S接觸系統的主要機制：費米能階解釘紮也給予了一些理論描述，而對於M-I-S接觸系統降低電阻值的機制，我有也稍作定性的描述，其關鍵來自於插入之絕緣層性質(如：介電係數(dielectric constant)、能帶位移(band offset)、載子等效質量(carrier effective mass)、能隙(band gap)等)與基板交互作用產生的影響。第二部分我以III-V族半導體基板：砷化銦鎵，並搭配三種不同種類之絕緣層：鈦酸鋇(BaTiO3)、二氧化鈦(TiO2)及氧化鋅(ZnO)，並使用鈦作為接觸金屬，實際做出M-I-S接觸結構，量測其接觸電阻，並將此實驗結果與M-S接觸的樣品做比較，發現當插入之絕緣層為氧化鋅時，其接觸電阻值會比原本沒有絕緣層之樣品小約10倍，我們發現氧化鋅與砷化銦鎵基板的傳導帶位移(Conduction Band Offset)接近零，即使其介電係數大小與其他二絕緣層相比不是很高，仍可以達到降低接觸電阻值的效果。In this paper, we make a comprehensive study on Metal-Insulator-Semiconductor (M-I-S) contact system for III-V compound material, InGaAs. With the scaling limitation of Si-based device, III-V compound materials are regarded as the promising candidates for n-channel device in next generation because of its high electron mobility and low electron effective mass. However, III-V compound materials also have the same problem as Si or Ge, the Fermi Level Pinning (FLP). Recently, the Metal-Insulator-Semiconductor (M-I-S) contact structures have been proposed to release the Fermi Level Pinning (FLP), by modulating the Schottky Barrier Height (SBH) and futher reduce the contact resistivity. Reduction of contact resistivity plays an important role on boosting the device performance, especially in on-state current, in scaling generation. At the first part, I collect several literatures about recent M-I-S development and list some papers which focus on M-I-S contact system based on different semiconductor substrates i.e. Si, Ge and III-V compound material. Then the mechanisms of Fermi Level Pinning and M-I-S contact system are also given. The key points of reduction of contact resistivity using M-I-S system are the properties of inserting insulator i.e. dielectric constant, band offset, carrier effective mass and band gap as well as the interactions between insulator and substrate. At the second part, I use three different kinds of insulator: BaTiO3, TiO2 and ZnO on InGaAs substrate. Then Ti is used as contact metal to form M-I-S ohmic contact. The experimental results of M-S and M-I-S contact were discussed here. We find that the contact resistivity will reduce ~10x when we insert ZnO as insulator. Due to its nearly zero conduction band offset, the reduction of contact resistivity is still achieved even though its dielectric constant is not high compare to other two insulators.4192673 bytesapplication/pdf論文使用權限: 同意有償授權(權利金給回饋學校)砷化銦鎵接觸電阻蕭特基能障費米能階釘札金屬-絕緣層-半導體接觸系統InGaAscontact resistivitySchottky Barrier HeightFermi Level PinningMetal-Insulator-Semiconductor contact systemthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/278337/1/ntu-104-R02522613-1.pdf