Wang Y.-ZWang Y.-PWu Y.-CCHIA-HSIANG YANG2021-09-022021-09-022018https://www.scopus.com/inward/record.uri?eid=2-s2.0-85056886437&doi=10.1109%2fVLSIC.2018.8502321&partnerID=40&md5=1090a95b44c3370fc6949878e77fa256https://scholars.lib.ntu.edu.tw/handle/123456789/580654This work presents a reconfigurable processor based on the alternating direction method of multipliers (ADMM) algorithm for reconstructing compressively-sensed signals. The chip delivers a throughput of 573-to-2,901KS/s for reconstructing physiological signals. It dissipates 12.6mW at 87 MHz at 0.6V. Compared to the state-of-the-art designs, the chip achieves a 5.7-to-14x higher throughput with 5-to-11x lower energy for the target reconstruction SNR (RSNR) ? 15dB. ? 2018 IEEE.Biomedical signal processing; VLSI circuits; Alternating direction method of multiplier (ADMM); Lower energies; Physiological signals; Reconfigurable processors; State of the art; Signal reconstruction[SDGs]SDG7A 12.6MW 573-2,901KS/S Reconfigurable Processor for Reconstruction of Compressively-Sensed Phvsiological Signalsconference paper10.1109/VLSIC.2018.85023212-s2.0-85056886437