國立臺灣大學電子工程學研究所吳安宇2006-07-262018-07-102006-07-262018-07-102003http://ntur.lib.ntu.edu.tw//handle/246246/19994Among existing works of high-speed pipelined Adaptive Decision Feedback Equalizer (ADFE), the pipelined ADFE using Relaxed Look-ahead technique results in a substantial hardware saving than the parallel processing or Look-ahead approaches. However, it suffers from both the SNR degradation and slow convergence rate. In this paper, we employ the Predictive Parallel Branch Slicer (PPBS) to eliminate the dependencies of the present and past decisions so as to reduce the iteration bound of Decision Feedback Loop of the ADFE. By adding negligible hardware complexity overheads, the proposed architecture can help to improve the output Mean-square-error (MSE) of the ADFE compared with the Relaxed Look-ahead ADFE architecture. Moreover, we show the superior performance of the proposed pipelined ADFE by theoretical derivations and computer simulation results.application/pdf254151 bytesapplication/pdfzh-TW國立臺灣大學電子工程學研究所reporthttp://ntur.lib.ntu.edu.tw/bitstream/246246/19994/1/912218E002029.pdf