A simulation-based temporal assertion checker for PSL

Dept. of Electr. Eng., National Taiwan Univ.Chang, Kai-HuiKai-HuiChangTu, Wei-TingWei-TingTuYeh, Yi-JongYi-JongYehKuo, Sy-YenSy-YenKuo2007-04-192018-07-062007-04-192018-07-062003-12N/Ahttp://ntur.lib.ntu.edu.tw//handle/246246/2007041910042753http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910042753/1/01562587.pdfapplication/pdf671782 bytesapplication/pdfen-USA simulation-based temporal assertion checker for PSLconference paper10.1109/mwscas.2003.1562587http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910042753/1/01562587.pdf