Thuc, Giao HuuGiao HuuThucCHING-JAN CHEN2023-07-142023-07-142023-01-019781665475396https://scholars.lib.ntu.edu.tw/handle/123456789/633633This paper proposes a gate driver IC for a GaN-based synchronous buck converter with a double-sided adaptive dead-time generator (DTG) to improve the converter efficiency with conventional fixed or single-sided DTG. It contains two main sub-blocks such as the phase error detector (PED) and the coarse/fine controllers. Applying the edge detection principle, the proposed dead-time control can minimize the dead-time and reverse conduction loss on both edges of the switching voltage, Vx, of a 1MHz 12 V to 5 V buck converter using e-mode GaN devices for 0.2 to 1 A load current range. The designed IC is fabricated with TSMC 0.18 μm HVG2 process. According to the post-simulation, the minimum dead time at 1 A load current is 28 ps. Compared with a 10 ns fixed DTG and single-sided DTG, efficiency is improved by 10% and 6%, respectively.Adaptive dead-time control | Coarse/Fine controllers | DC-DC converter | GaN devices | Gate Driver IC | Phase Error Detector[SDGs]SDG7A Gate Driver IC for GaN-Based Synchronous Buck Converter with A Double-Sided Adaptive Dead- Time Generatorconference paper10.1109/APEC43580.2023.101313972-s2.0-85162269438https://api.elsevier.com/content/abstract/scopus_id/85162269438