Dept. of Electr. Eng., National Taiwan Univ.Kuo, Sy-YenSy-YenKuo2007-04-192018-07-062007-04-192018-07-061992-09http://ntur.lib.ntu.edu.tw//handle/246246/2007041910032329application/pdf378563 bytesapplication/pdfen-USLocating logic design errors via test generation and don't-care propagationconference paper10.1109/EURDAC.1992.246202http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910032329/1/00246202.pdf