Dept. of Electr. Eng., National Taiwan Univ.Chen, C.S.C.S.ChenKuoJB2007-04-192018-07-062007-04-192018-07-061993-08N/Ahttps://www.scopus.com/inward/record.uri?eid=2-s2.0-0027648853&doi=10.1049%2fel%3a19931044&partnerID=40&md5=b97d83b5d784c43747ed081fa20ada87An analytical drain current model for a-Si: H TFTs obtained by considering deep and tail states simultaneously is presented. Using an effective temperature approach, the localised deep and tail states have been considered in the DC model such that no approximations are needed. As verified by the published data, this analytical DC model provides an accurate prediction on the drain current characteristics of an a- Si: H thin film transistor. © 1993, The Institution of Electrical Engineers. All rights reserved.application/pdf278610 bytesapplication/pdfen-USSemiconductor device models; Thin film transistorsAnalytical drain current model for a-Si:H TFTs by simultaneously considering localised deep and tail statesjournal article10.1049/el:199310442-s2.0-0027648853http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910042629/1/00234329.pdf