2024-05-182024-05-1825651https://scholars.lib.ntu.edu.tw/handle/123456789/716453Vita Pi-Ho Hu is a Professor in the Department of Electrical Engineering at National Taiwan University. She earned her B.S. in Materials Science and Engineering and her Ph.D. from the Institute of Electronics at National Chiao Tung University, Taiwan, in 2004 and 2011, respectively. Her research focuses on Ferroelectric FETs, advanced nanoelectronics, low-power/high-performance SRAM, monolithic 3D ICs, and design-technology co-optimization. She has authored or co-authored over 100 peer-reviewed journal and conference papers. Dr. Hu received the Outstanding Paper Award at the 2011 IEEE ICICDT, the Taiwan Semiconductor Industry Association’s Postdoctoral Research Award in 2014, and the Best Paper Award at the 2015 IEEE IPFA. Additionally, she was honored with the Excellent Young Researcher Project Award from Taiwan's Ministry of Science and Technology (MOST) in 2016, the Pan Wen Yuan Foundation's Exploration Research Award in 2017, the Excellent Teaching Award at NCU in 2018, the MOST Young Scholar Fellowship in 2018, the Outstanding Youth Award from EDMA in 2019, the prestigious Ta-You Wu Memorial Award in 2021, and the Outstanding Women in Science Award in 2023. Prior to joining NTU, Dr. Hu served as an Assistant Professor in the Department of Electrical Engineering at National Central University from 2015 to 2019. She joined NTU as an Associate Professor in 2020. She has also been a Visiting Scholar in the Department of Electrical Engineering and Computer Science at UC Berkeley during the summers of 2017 and 2018. Dr. Hu is actively engaged in the technical community, serving on the technical committees for ISQED (2018–2025), EDTM (2025), ISCAS (2024–2025), and IEDM (2022–2024).Ferroelectric FET, memory and circuits for ultra-low power and neuromorphic applications鐵電場效電晶體記憶體及電路設計Silicon, Ge, III-V, and 2D materials based nano-electronicsLow power and high performance SRAM designMonolithic 3D IC and design-technology co-optimization前瞻奈米電子元件靜態隨機存取記憶體設計積層型三維積體電路及設計技術共同最佳化