Dept. of Electr. Eng., National Taiwan Univ.Tsai, I-MingI-MingTsaiKuo, Sy-YenSy-YenKuo2007-04-192018-07-062007-04-192018-07-062001-1019449399http://ntur.lib.ntu.edu.tw//handle/246246/2007041910021343https://www.scopus.com/inward/record.uri?eid=2-s2.0-57649145355&doi=10.1109%2fNANO.2001.966403&partnerID=40&md5=f784cffe7504baa4cdd143937d0209eeThe discovery of Shor's prime factorization and Grover's fast database search algorithm have made quantum computing the most rapidly expanding research field recently. Nanotechnology, in particular silicon-based nanoscale device, has been proposed as one of the candidates that can be used to implement a quantum computer. In this paper, we have derived a systematic procedure to realize any general m-to-n bit combinational boolean logic using elementary quantum gates. The quantum circuit layout under the locality constraint is then formulated, together with the gate count evaluation function, to reduce the total number of quantum gates required to implement the circuit. © 2001 IEEE.application/pdf371320 bytesapplication/pdfen-USAlgorithms; Computation theory; Logic circuits; Logic gates; Quantum computers; Quantum electronics; Quantum optics; Quantum theory; Search engines; Database search algorithms; Evaluation function; Nanoscale device; Prime factorization; Quantum Boolean circuits; Quantum circuit; Quantum Computing; Research fields; NanotechnologyQuantum Boolean circuit construction and layout under locality constraintconference paper10.1109/NANO.2001.9664032-s2.0-57649145355http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021343/1/00966403.pdf