Novel RDL design of wafer-level packaging for signal/power integrity in LPDDR4 application

K.-B. WuT.-Y. KuoB. HungB. LinC. PengM.-T. YangR.-B. WuRUEY-BEEI WU2019-10-242019-10-24201821563950https://scholars.lib.ntu.edu.tw/handle/123456789/427878Novel RDL design of wafer-level packaging for signal/power integrity in LPDDR4 applicationjournal article10.1109/tcpmt.2018.28505282-s2.0-85049135249