Huang, Tian-WeiTian-WeiHuangChuang, Kai-JieKai-JieChuangTang, Kin-PingKin-PingTangWang, Yi-WenYi-WenWangChang, Ting-YuTing-YuChangTsai, Jeng-HanJeng-HanTsai2026-03-112026-03-112025-11-14[9782874870828]https://www.scopus.com/record/display.uri?eid=2-s2.0-105027170519&origin=resultslisthttps://scholars.lib.ntu.edu.tw/handle/123456789/736223This paper presents a D-band sub-harmonic IQ modulator in 28-nm CMOS, achieving a 43 dB image rejection ratio (IRR) with zero DC power consumption. The design integrates a Lange coupler and stacked metal passive components to reduce insertion loss and enhance quadrature accuracy. The modulator achieves a conversion gain (CG) of -8 dB and an average IRR of 40 dB from 142 GHz to 152 GHz. Measurement results confirm that the proposed architecture effectively mitigates phase and amplitude mismatches, making it a promising candidate for high-frequency communication systems.falsebaluncouplerD-bandimage rejection ratiomodulatorconference paper10.23919/eumic65284.2025.112346562-s2.0-105027170519