Chang K.-CLu B.-ZWang YChiong C.-CHUEI WANG2021-09-022021-09-022020https://www.scopus.com/inward/record.uri?eid=2-s2.0-85100754318&doi=10.1109%2fAPMC47863.2020.9331381&partnerID=40&md5=4e9ac0f7a6285ab9c45948d2bfe83041https://scholars.lib.ntu.edu.tw/handle/123456789/580869A 17.7-42.9-GHz low-power CMOS low noise amplifier (LNA) for radio astronomical receivers in 65-nm CMOS technology is presented in this paper. Based on several bandwidth enhancement techniques, the proposed LNA achieves high gain, good noise Figure simultaneously in a wide frequency range while consuming low power. The LNA achieves the 20.1-dB peak gain, and the noise Figure (NF) between 2.8 and 4.3 dB within the 3-dB bandwidth covering 17.7 to 42.9 GHz. The dc power consumption of this design is only 18 mW, while the OP1dB is 2.2 dBm at 28GHz. The figure-of-merit (FOM) of this work is 19 GHz/mW, which reveals the competitiveness among published K-band and Ka-band LNAs. The whole chip occupies 0.45 mm2 including pads. ? 2020 IEEE.Bandwidth; CMOS integrated circuits; Noise figure; Bandwidth enhancement; CMOS technology; DC power consumption; Figure of merit (FOM); Fractional bandwidths; Low power CMOS; Radio-astronomical receivers; Wide frequency range; Low noise amplifiersconference paper10.1109/APMC47863.2020.93313812-s2.0-85100754318