指導教授：林宗賢臺灣大學：電子工程學研究所王邦全Wang, Bang-CyuanBang-CyuanWang2014-11-302018-07-102014-11-302018-07-102014http://ntur.lib.ntu.edu.tw//handle/246246/263910隨著可攜式醫療器材的問世，無線傳輸在醫療應用的重要性大幅上升，如何提升無線收發機的能量效率，是近年來的無線傳輸發展目標。在傳統以混波器為基礎的收發機架構中，頻率合成器與混波器皆消耗大量能量，使得在生醫應用的發展上受到限制。 此外，近年來以相位選擇器為基礎的高效能相位偏移調變無線發射器已陸續被提出，最高資料傳輸率可達數10 Mbps左右。然而，相位偏移調變無線接收器受限於解調架構，尚未達到與發射器相稱的傳輸效率。 本論文提出一個具高能量效率，操作在四億赫茲，採用差動式二元相位偏移調變(D-BPSK)的無線收發器。發射器部分使用邊緣合成器降低載波產生器的操作頻率，可大幅減少功率消耗，並使用相位選擇器達到高資料傳輸率。接收器的核心技術為利用注入式鎖定振盪器的動態特性，達到相位對振幅之轉換，並藉此偵測相對相位變化即可完成解調。此架構不需要閉迴路系統來完成相位同步，可大幅簡化系統架構，進而降低成本及功率耗。此收發機使用台積電0.18微米製程設計，發射器功率消耗為0.732毫瓦，最大資料傳輸率為10 Mbps，此時誤差向量幅度為11 %，能量效率為73.2 pJ/bit；接收器功率消耗為1.66 毫瓦，靈敏度為-70.2 dBm，當接收10 Mbps的訊號時，能量效率為166 pJ/bit。Wireless communication is more and more important with the development of wearable devices, and the energy efficiency is critical under stringent power budget. Conventional mixer-based architecture suffers from power hungry mixers and frequency synthesizer and has many constraints for bio-medical applications. Phase-selector-based PSK transmitter has been widely proposed to increase energy efficiency and the maximal data rate is up to several tens of Mbps. However, limited by the demodulating architecture, a highly efficient PSK receiver has not yet been published. In this work, an energy-efficient 400-MHz D-BPSK transceiver is proposed. The edge-combining technique is applied to lower the operating frequency of frequency generator in transmitter, and therefore power consumption decreases. The phase-selector-based technique is also used for transmitter to achieve high data rate. The D-BPSK receiver adopts injection-locking technique to perform dynamic phase-to-amplitude conversion, which detects the relative phase transition and the data is therefore demodulated by envelope detector. In this receiver, the phase-tracking loop is not required, which diminishes power consumption and cost. The transceiver is fabricated in TSMC 0.18-μm CMOS technology. The power consumption of transmitter is 0.732 μW, and the EVM is 11%, energy efficiency is 73.2 pJ/bit at maximal data rate 10 Mbps. The receiver consumes 1.66 mW with 0.9-V supply. The sensitivity of receiver is -70.2 dBm, and the energy efficiency is 166 pJ/bit at 10-Mbps data rate.Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Data-rate Requirement 2 1.3 Operating Radio-frequency Band 3 1.4 Modulation Scheme 4 1.5 Link Budget 6 1.6 Thesis Overview 7 Chapter 2 Introduction to Low- Power Wireless Transceiver 9 2.1 General Architecture of Wireless Transceiver 9 2.2 Low-Power Direct-Modulation Transmitter 12 2.2.1 PLL-Based In-Loop-Modulation Transmitter 12 2.2.2 Direct-VCO-Modulation Transceiver 13 2.2.3 OOK Transmitter 14 2.2.4 Polar Transmitter 14 2.2.5 Phase-Selector-Based Transmitter 15 2.3 Low-Power Non-Coherent-Detection Receiver 16 2.3.1 Super-Regenerative Receiver (SR RX) 16 2.3.2 Injection-Locked-Based Receiver 17 2.3.3 Injection-Locked-Based BPSK Receiver [36] 22 Chapter 3 Proposed BPSK Transmitter Based on Phase-Switching and Edge-Combining Technique 25 3.1 Introduction 25 3.2 Proposed Transmitter Architecture 26 3.2.1 Concept of edge-combining-based frequency-multiplication technique 26 3.3 Circuit Implementations 28 3.3.1 Pulse generator 28 3.3.2 Multi-phase ring oscillator 29 3.3.3 Edge-combining power amplifier 32 3.4 Analysis of TX Spurs 35 3.5 Experimental Results of BPSK Transmitter 44 3.5.1 Chip Photo 44 3.5.2 Test Setup 45 3.5.3 PCB Board 46 3.5.4 Measured Results 47 Chapter 4 A Low-power High-bandwidth D-BPSK Wireless Transceiver 53 4.1 Introduction to D-BPSK Modulation 53 4.2 Proposed D-BPSK Transmitter 55 4.3 Proposed D-BPSK Receiver 56 4.3.1 Concept of prior phase-to-amplitude conversion 56 4.3.2 Injection-locked Oscillator (ILO) as a proposed phase-to-amplitude convertor 57 4.3.3 Proposed DPSK receiver architecture using injection-locked oscillator 60 4.3.4 Gain requirement of the proposed receiver 61 4.4 Circuit Implementations 63 4.4.1 Design of Phase-Locked Loop in D-BPSK Transmitter 63 4.4.2 Design of Low-Noise Amplifier (LNA) and Multi-Stage Amplifier 67 4.4.3 Injection-Locked Digitally-Controlled Oscillator 72 4.4.4 Baseband Circuits 76 4.5 Experimental Results 77 4.5.1 Measured Results of D-BPSK Transmitter 77 4.5.2 Measured Results of D-BPSK Receiver 81 Chapter 5 Conclusions and Future Works 87 5.1 Conclusions 87 5.2 Future Works 88 References 892513746 bytesapplication/pdf論文公開時間：2019/08/21論文使用權限：同意有償授權(權利金給回饋學校)差動式二元相位偏移調變相位選擇器邊緣合成器注入式鎖定無線收發器[SDGs]SDG7thesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/263910/1/ntu-103-R00943036-1.pdf