顧孟愷臺灣大學：資訊工程學研究所王亞群Wang, Ya-ChengYa-ChengWang2007-11-262018-07-052007-11-262018-07-052005http://ntur.lib.ntu.edu.tw//handle/246246/53973High Peak-to-Average Power Ratio (PAPR) poses serious problem for the analog front end power amplifier design of Orthogonal Frequency Division Multiplexing (OFDM) systems. In this paper, an OFDM transmitter with PAPR reduction is proposed. The proposed PAPR reduction schemes are a transmitter only modification thus compatible with existing OFDM receivers. Other than PAPR reduction performance, hardware implementation complexity and power amplifier efficiency are also crucial factors in the selection of PAPR schemes. A thorough survey of PAPR reduction schemes is carried out in this paper. The proposed combinational scheme works for various QAM constellations. An OFDM transmitter is implemented in FPGA to validate our design.ABSTRACT I CONTENTS II CHAPTER 1: INTRODUCTION 1 CHAPTER 2: OVERVIEW OF OFDM SYSTEM 4 2.1 OFDM OVERVIEW 4 2.2 GUARD TIMES AND CYCLIC PREFIX 5 2.3 POWER SPECTRUM DENSITY IN OFDM 6 2.4 802.16A STANDARD FOR OFDM SYSTEM 8 2.4.1 General parameter 8 2.4.2 Preamble 9 CHAPTER 3: CHANNEL OF WIRELESS COMMUNICATION 11 3.1 PACKET DETECTION 11 3.2 FREQUENCY SAMPLING OFFSET 14 3.3 CARRIER FREQUENCY OFFSET 17 3.4 MULTIPATH 19 3.5 PA MODEL 21 CHAPTER 4: PEAK-TO-AVERAGE POWER RATIO IN OFDM 23 4.1 INTRODUCTION 23 4.2 DISTRIBUTION OF PAPR 24 4.3 EXISTENCE PAPR REDUCTION SCHEMES 27 4.3.1 Tone Reservation 27 4.3.2 Dummy Sequences 31 4.3.3 Direct Cosine Reduction 32 4.3.4 Tone Injection 33 4.3.5 Maximum Likelihood Detection 34 4.3.6 Phase Rotation Methods 35 4.3.7 PAPR reduction codes 39 4.3.8 Linear Scaling and Block Scaling 40 4.3.9 Carrier Interferometry OFDM 41 4.3.10 Linear Programming Methods 42 4.3.11 Genetic Algorithm for PAPR Reduction 45 4.3.12 Spectral Shaping 47 4.3.13 Complementary Clipping Transform 48 4.3.14 Signal Space Extension 48 CHAPTER 5: TRANSMITTER ARCHITECTURE 53 5.1 PAPR SCHEME CHOICES 53 5.2 COMBINED TWO PAPR REDUCTION SCHEMES 55 5.2.1 ACE 55 5.2.2 Tone Reservation 56 5.3 FAST FOURIER TRANSFORM 65 5.4 DIRECT FREQUENCY SYNTHESIZER 70 5.5 FPGA IMPLEMENTATION 70 CHAPTER 6: CONCLUSION AND FUTURE WORK 73853022 bytesapplication/pdfen-US正交分頻多工峰均值PAPROFDMPARthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/53973/1/ntu-94-R92922082-1.pdf