A 10-Gb/s Eye-Opening Monitor Circuit for Receiver Equalizer Adaptations in 65-nm CMOS

Lin, Y.-C.Y.-C.LinHEN-WAI TSAO2021-04-222021-04-222020https://www.scopus.com/inward/record.url?eid=2-s2.0-85077821903&partnerID=40&md5=3755ec20d1c45bc8802e8f1029e873behttps://scholars.lib.ntu.edu.tw/handle/123456789/557636A 10-Gb/s Eye-Opening Monitor Circuit for Receiver Equalizer Adaptations in 65-nm CMOSjournal article10.1109/TVLSI.2019.29353052-s2.0-85077821903WOS:000506608100004