Circuit Partition and Reordering Technique for Low Power IP

Tsai, Kun-LinKun-LinTsaiRuan, Shanq-JangShanq-JangRuanHuang, Chun-MingChun-MingHuangNaroska, EdwinEdwinNaroskaLai, FeipeiFeipeiLai2009-02-272018-07-062009-02-272018-07-062004http://ntur.lib.ntu.edu.tw//handle/246246/142050en-USCircuit Partition and Reordering Technique for Low Power IPjournal article