Efficient approach for via minimization in multi-layer VLSI/PCB routing

Cherng, Jong-ShengJong-ShengCherngChen, Sao-JieSao-JieChenTsai, Chia-ChunChia-ChunTsaiHo, Jan-MingJan-MingHoSAO-JIE CHEN2018-09-102018-09-101995http://www.scopus.com/inward/record.url?eid=2-s2.0-0029225859&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/316424Efficient approach for via minimization in multi-layer VLSI/PCB routingconference paper