Fewest vias design for microstrip guard trace by using overlying dielectric

Y.-S. ChengW.-D. GuoG.-H.ShiueH.-H. ChengC.-C. WangRUEY-BEEI WU2018-09-102018-09-102008-10http://scholars.lib.ntu.edu.tw/handle/123456789/342491Fewest vias design for microstrip guard trace by using overlying dielectricconference paper10.1109/EPEP.2008.46759452-s2.0-58049119726