胡振國臺灣大學：電子工程學研究所江榮進Chiang, Jung-ChinJung-ChinChiang2007-11-272018-07-102007-11-272018-07-102007http://ntur.lib.ntu.edu.tw//handle/246246/57463本篇論文為探討在不同成長溫度下，超薄氧化鋁高介電常數閘極介電層之電特性。首先在p型矽基板上生長超薄初始二氧化矽做為緩衝層，接著在室溫下，利用一定濃度的硝酸氧化蒸鍍上去的鋁薄膜，再配合650℃的高溫，於氮氣中進行熱退火技術，可得到等效厚度為1.8nm的氧化鋁閘極絕緣層，其等效介電常數為7.8。與具有相同等效厚度之二氧化矽介電層相比，其閘極漏電流較低1000倍。且此氧化鋁閘極介電層的電容值隨著頻率的分散現象較一般高介電常數閘極介電層並不明顯，遲滯效應也極小，評估界面特性由高低頻率電容值求得界面電荷陷阱所導致的電容差值也在可接受的範圍之內。以上結果均顯示高品質之氧化鋁閘極介電層可由此種硝酸氧化金屬薄膜技術所製備。另外，近來軟性電子產品的流行，由於軟性基板有其不耐高溫的限制，如何在軟性基板上生長高品質的閘極介電層的研究也隨之重要。室溫純水中陽極氧化技術被我們利用於生長初始二氧化矽層。為了提高在生長超薄氧化鋁閘極介電層中，超薄純鋁膜沉積於p型矽基板的機率。我們提出在較高的蒸鍍速率中，以遮蔽式蒸鍍方式備製超薄鋁薄膜的方式。同樣的接著以硝酸氧化，整個製程溫度不超過400℃。這種低溫生長的氧化鋁高介電常數閘極介電層的閘極漏電流也較具有相同等效厚度之二氧化矽介電層低10倍。施加定電流stress測試其可靠度也可發現閘極氧化層內部電荷陷阱所造成的影響不明顯。最後，為了降低在低溫製程中，高介電常數閘極介電層與p型矽基板中間緩衝層的厚度，以得到較高等效介電常數，並且提高其界面品質。調整陽極氧化參數並利用交直流電場方式，以盡量不增加厚度的前提下進行介面補償。比較有無補償的電容變化，可發現經過補償之後的元件電容曲線較為正常，其閘極漏電流與相同等效氧化層厚度之二氧化矽在同一範圍。In this work, the electrical properties of ultra-thin aluminum oxide (Al2O¬3) high-k gate dielectric prepared under different process temperatures are investigated. At first, ultra-thin SiO2 layer was prepared for initial buffer layer, and then the deposited aluminum films was oxidized by diluted nitric acid (HNO3) followed by 650℃ annealing in N¬2. The equivalent oxide thickness (EOT) of Al2O3 gate dielectric is 1.8 nm and the effective dielectric constant is 7.8. The gate leakage current of this Al2O3 gate dielectric is three orders smaller than that of SiO2 dielectric with the same EOT. The frequency dispersion and hysteresis phenomenon of C-V curves are negligible. As for the interfacial quality, trap induced capacitance (Cit) obtained by high-low-frequency calculation is also acceptable. These results show that the high quality Al2O3 high-k gate dielectric can be prepared by HNO3 oxidation. In addition, the research of flexible electronics is popular recently for the flexible substrates cannot bear the high temperature process. It is crucial that fabricating high quality gate dielectrics on flexible substrates. Anodization in D. I. water technique was utilized in preparing the initial SiO2 film at room temperature. In order to increase the probability of aluminum film formation on p-Si at evaporation, shadow evaporation was proposed under higher evaporated rate and followed HNO3 oxidation. All of the process temperature is lower than 400℃. The gate leakage current of this Al2O3 gate dielectric is also one order lower than that of SiO2 dielectric with the same EOT. The reliability examined by constant current stress (CCS) shows that the effect of the traps in dielectric is not obvious. Finally, to decrease the thickness between high-k gate dielectric and p-Si and enhance the interfacial quality, DAC-ANO electrical field was used to compensate the interface without increasing thickness. The C-V curve with compensation is more normal than that without compensation.Acknowledgement.....................................................................................................I Abstract (Chinese)..................................................................................................III Abstract (English)....................................................................................................V Contents.....................................................................................................................VI Figure Captions....................................................................................................VIII Table Captions........................................................................................................XII Chapter 1 Introduction 1-1 Motivation………………………………………….………………….1 1-2 High-k Gate Dielectrics under Low Temperature Process…………….3 1-3 Analysis Tools and Theoretical Models………….…………….……....5 1-3-1 C-V and J-V Relationship………………….………..………5 1-3-2 View Factor of Evaporation………………………..……….9 1-4 About This Work……………………………………………………..11 Chapter 2 Al2O3 Gate Dielectrics Prepared by Oxidation of Aluminum in HNO3 Followed by High Temperature Annealing 2-1 Introduction………………………………….……………………….19 2-2 Stacked Structure of Rapid Thermal Oxide and Aluminum Oxide……………………………………………………………...….21 2-3 Results and Discussion……….….……………..………..…………........23 2-3-1 Transmission Electron Microscope Results of MOS Structure……………...………….………………..………….23 2-3-2 Capacitance-Voltage Characteristics……………..…..…..…23 2-3-3 Interfacial Property between Al2O3 and Si……………..….24 2-3-4 Current Density versus Equivalent Oxide Thickness............26 2-3-5 Charge Trapping Behavior…............…...............................26 2-4 Summary……………………………..…………….………………….27 Chapter 3 Low Temperature Al2O3 High-k Gate Dielectrics Prepared by Shadow Evaporation of Aluminum Followed by HNO3 Oxidation 3-1 Introduction..........................................................................................35 3-2 System Setup and Experiment..................................................…............37 3-3 Results and Discussion.........................................................................39 3-3-1 Equivalent Oxide Thickness Distribution............................39 3-3-2 Capacitance-Voltage Characteristics....................................40 3-3-3 Current-Voltage Characteristics............................................42 3-3-4 Charge Trapping Behavior...................................................43 3-4 Summary.................................................................................................43 Chapter 4 Al2O3 Gate Dielectrics with DAC-ANO Compensation 4-1 Introduction...........................................................................................51 4-2 Experiment.................................................................................................52 4-3 DAC-ANO Compensation Effects........................................................54 4-3-1 Capacitance-Voltage Characteristics.....................................54 4-3-2 Current-Voltage Characteristics..............................................55 4-4 Summary................................................................................................56 Chapter 5 Conclusions 5-1 Conclusions..........................................................................................61 5-2 Suggestions for Future Work................................................................63 References..........................................................................................................................652900362 bytesapplication/pdfen-US高介電常數介電質遮蔽式蒸鍍氧化鋁金氧半元件陽極氧化低溫交直流陽極氧化補償High-k dielectricsShadow evaporationAl2O3MOS deviceAnodizationLow temperatureDAC-ANO compensationthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/57463/1/ntu-96-R94943046-1.pdf