呂學士臺灣大學:電子工程學研究所林聖紘Lin, Sheng-HungSheng-HungLin2010-07-142018-07-102010-07-142018-07-102008U0001-2907200811563400http://ntur.lib.ntu.edu.tw//handle/246246/189064在現代無線通訊系統中，無論是在發射端或是在接收端，頻率合成器皆扮演非常重要的角色。其中又以鎖相迴路為主的頻率合成器大量地被使用。然而，統的整數型鎖相迴路有著頻率解析度和迴路頻寬的設計衝突，因此分數型頻率成器較常使用於無線應用中，能同時擁有大的迴路頻寬與精準的頻率解析度。角積分分數型頻率合成器為最常被使用的一種架構，因為它的分數突波較，且三角積分調變器具有將量化雜訊移往高頻去的特性。在本論文中，於台積零點一八微米金氧半製程，實現了兩個三角積分分數型頻率合成器，其操作頻amp;#63841;為2.4 GHz。採用LC 壓控振盪器，鎖相迴路整體的相位雜訊良好。本論文的附錄A，利用聯電九零奈米製程，實現了一個適用於超寬頻(UWB)訊系統第一組頻率 (3432, 3960 and 4488 MHz)的頻率合成器。此晶片擁有好的位雜訊輸出，並有極短的切換頻道速度 (2ns) 。錄B 為自行研發的基本數位電路邏輯閘的佈局圖，是設計於台積電零點八微米製程，一共三十個。此基本數位電路邏輯閘，可提供數位電路藉由相關體來做自動繞線，產生佈局圖。In the modern communication system, frequency synthesizers play an essentialole either in the transmitting path or receiving path. Among several types ofrequency synthesizers, the PLL-based frequency synthesizers are the most popularne. However, conventional integer-N frequency synthesizers suffer from the tradeoffetween the loop bandwidth and the frequency resolution. Therefore, fractional-Nrequency synthesizers are adopted to achieve both small frequency resolution andide loop bandwidth.Σ fractional-N frequency synthesizers, for its lower spurs magnitude andigh-pass noise shaping ability, are most often adopted. Two ΔΣ fractional-Nrequency synthesizers implemented in TSMC 0.18-um process are presented in thishesis. Operating at 2.4 GHz, with the LC-VCO, the synthesizers exhibit good phaseoise.n appendix A, a low-power CMOS frequency synthesizer for mode-I (3432,960 and 4488 MHz) UWB MB-OFDM transceiver is presented. Implemented inMC 90 nm process, the synthesizer exhibits good phase noise and fast switchingime in 2 ns.n appendix B, a set of digital cells is established under TSMC 0.18-um process.tilizing the digital cells, the layout work of a digital circuit can be auto-routed by theid of some CAD tools.Chapter 1 Introduction .............................................................................................. 1.1 Introduction ................................................................................................ 1.2 Organization ............................................................................................... 2hapter 2 Phase-Locked Loop-based Frequency Synthesizer ............................... 5.1 Typical Phased-Locked Loop .................................................................... 6.2 Requirements of frequency synthesizer ..................................................... 7.3 Linear model of PLL ................................................................................ 10.3.1 First-order loop filter.................................................................... 11.3.2 Second-order loop filter ............................................................... 13.3.3 Third-order loop filter .................................................................. 15.4 Phase noise analysis ................................................................................. 17.5 RMS phase error ...................................................................................... 20hapter 3 Fractional-N Frequency Synthesizer .................................................... 23.1 Introduction .............................................................................................. 23.1.1 Integer-N Frequency Synthesize .................................................. 23.1.2 Fractional-N Synthesis ................................................................. 24.2 Fractional-N PLL Issues .......................................................................... 25.3 Delta-Sigma Frequency Synthesizer ........................................................ 27.3.1 ΔΣ modulators operation and insights ......................................... 29.3.2 Analysis of ΔΣ modulators........................................................... 32.4 Fractional-N Synthesizer Noise ............................................................... 36hapter 4 2.4-GHz CMOS ΔΣ Fractional-N Frequency Synthesizers ................ 39.1 Introduction .............................................................................................. 39.2 Frequency Synthesizer I ........................................................................... 41.2.1 Architecture.................................................................................. 41.2.2 LC-VCO ....................................................................................... 42.2.3 Truly Modular Programmable Divider ........................................ 46.2.4 Reduced Delta-Sigma Modulator ................................................ 52.2.5 PFD/CP/LPF ................................................................................ 54.2.6 Three-Wire Control Interface ....................................................... 58.3 Frequency Synthesizer II with Adaptive-Frequency Calibration (AFC) . 60.3.1 Introduction .................................................................................. 60.3.2 Architecture.................................................................................. 62.3.3 LC-VCO With A 4-bit Capacitance Array ................................... 63.3.4 Adaptive-Frequency Calibration loop.......................................... 65.4 Experiment Results .................................................................................. 68.4.1 Frequency Synthesizer I ............................................................... 68.4.2 Frequency Synthesizer II ............................................................. 76.5 Summary .................................................................................................. 81ibliography ............................................................................................................... 83ppendix A Low-Power CMOS Frequency Synthesizer for Mode-I UWBB-OFDM Transceiver .................................................................... 85ppendix B Digital Cells ........................................................................................ 998647387 bytesapplication/pdfen-US鎖相迴路三角積分器分數型鎖相迴路頻率合成器超寬頻頻率合PLLdelta-sigma modulatorΔΣ fractional-N frequency synthesizerUWBthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/189064/1/ntu-97-R95943068-1.pdf