Y.-C. HuangTAI-CHENG LEE2018-09-102018-09-102006-060018920000189200http://scholars.lib.ntu.edu.tw/handle/123456789/325768A Miller-divider-based clock generator is proposed for Multi-Band OFDM Alliance (MBOA) ultrawideband (UWB) application. Employing closed-loop operation, the clock generator can produce three different carrier frequencies with negligible in-band spurs. The settling time of the proposed clock generator is analyzed based on a linear feedback system. A transistor sizing optimization technique for active inductors with a current-reusing technique is used to achieve low-power operation and area saving. Fabricated in a 0.18-μm technology, the clock generator achieves less than 9.5-ns settling time while dissipating less than 47 mW from a 1.8-V power supply. © 2006 IEEE.Frequency synthesizer; Miller divider; Ultrawideband (UWB)Carrier frequencies; Clock generators; Miller dividers; Ultrawideband (UWB); Broadband networks; Electric generators; Electric inductors; Frequency synthesizers; Linear control systems; Orthogonal frequency division multiplexing; Transistors; Electric clocksjournal article10.1109/JSSC.2006.8742792-s2.0-33746591255WOS:000238153800003