Partitioned gate tunnelling current model considering distributed effect for CMOS devices with ultra-thin (1 nm) gate oxide

Dept. of Electr. Eng., National Taiwan Univ.C. H. LinK. W. SuS. LiuJAMES-B KUO2018-09-102018-09-102006-02https://www.scopus.com/inward/record.uri?eid=2-s2.0-32044438420&doi=10.1049%2fel%3a20064060&partnerID=40&md5=dd9e5c7b91c6b50a6b8b6211cc65eeddThe partitioned gate tunnelling current model considering the distributed effect for CMOS devices with an ultra-thin (1 nm) gate oxide is reported. As verified by the experimentally measured data, the partitioned gate tunnelling current model considering the distributed effect provides a better prediction of the total gate, drain and source currents as compared to the BSIM4 model.application/pdf978002 bytesapplication/pdfElectric currents; Electron tunneling; Gates (transistor); Mathematical models; Distributed effect; Gate oxide; Gate tunnelling current; Source currents; CMOS integrated circuitsPartitioned gate tunnelling current model considering distributed effect for CMOS devices with ultra-thin (1 nm) gate oxidejournal article10.1049/el:200640602-s2.0-32044438420WOS:000235479100037