賴飛罷臺灣大學：資訊工程學研究所張馨怡Chang, Hsin-YiHsin-YiChang2007-11-262018-07-052007-11-262018-07-052004http://ntur.lib.ntu.edu.tw//handle/246246/53862隨著製程技術的進步，導線之間的雜訊問題已經變的比以前更加嚴重，特別是由電感效應所導致的雜訊。一個有效減少電桿引起之雜訊的有效方法是在導線之間插入接地線，這是因為接地線可以當作是很好的電流回流通路。我們利用實際的HSPICE模擬結果提出了一個有效率的屏蔽演算法。此演算法可以根據輸入的資訊算出可以允陷﹞J的接地線數目，接下來，將所有的導線分成數個區塊，再分別找出此區塊中最適合插入接地線之處；最後，所有區塊的結果將會被集合起來，以利找出對於所有導線而言最佳的接地線插入位置。此演算法是以實際的HSPICE模擬結果當作參考值來決定接地線的位置，因此可以提供較高的正確性。此演算法可以利用減少電感導致的雜訊來達到降低必v消耗以及縮短延遲時間的弁遄C實驗結果顯示在增加百分之四十以下額外的面積，平均每插入一條接地線可以減少百分之五的必v消耗。With the advance of process technology, the crosstalk between wires has become more serious than before, especially the noise induced by inductive effect. An efficient approach to reduce inductive noise is to insert shield (GND or Power line) between wires because the shield can be very good current return path. We propose an efficient shield insertion algorithm by characterizing realistic HSPICE simulation results. Based on the profiling information, it counts the allowable shield numbers. Besides, it divides the wires into several windows and analyzes the input behavior of each window to find out the most appropriate shield location of each window. Finally, the results of all windows will be gathered to obtain the final shield location of all wires. This algorithm takes the realistic HSPICE simulation results as input instead of mathematical model, so it can provide higher accuracy. This algorithm can save power dissipation and shorten delay time by reducing inductive noise. The experimental result shows that when the area overhead is less than 40%, every inserted shield can reduce about 5% power dissipation, and the delay can be shortened at the same time.Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Crosstalk-reduction Methods 2 1.2.1 Capacitive Noise 2 1.2.2 Inductive Noise 4 1.3 Related Work 7 1.4 Outline of the Following Chapters 8 Chapter2 Background and Architecture 9 2.1 Capacitance and Inductance of Bus Interconnects 9 2.1.1 Formulation of capacitance 9 2.1.2 Formulation of inductance 12 2.1.2.1 Magnetic fields and current-carrying conductors 12 2.1.2.2 Self Inductance 12 2.1.2.3 Mutual Inductance 13 2.2 Shielding Method to Reduce Inductive Noise 14 2.3 RLC Model 16 2.3.1 Extraction of the value of Resistance (R) and Inductance (L) 16 2.3.2 Extraction of the value of Capacitance (C) 19 2.3.3 Architecture of RLC Model 20 Chapter 3 Shield Insertion Algorithm 22 3.1 Problem Formulation 22 3.2 Characterization of Power Information for Different Size of Windows 25 3.3 Shield Insertion Algorithm 29 3.2.1 Divide All Wires into Several Windows 30 3.3.2 Analyzing Input Pattern 33 3.3.3 Find Local Optimization in each Window 35 3.3.4 Getting Final Shield Locations Overall 37 Chapter 4 Experimental Setup and Result 40 4.1 Experimental Environment 40 4.2 Experimental Flow 40 4.3 Experimental Result 42 4.3.1 Address Bus 42 4.3.2 Data Bus 46 Chapter 5 Conclusion 47 Bibliography 482228015 bytesapplication/pdfen-US低必v電感效應電流回流通路匯流排雜訊HSPICEbusLow_Powerinductive_effectnoisethesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/53862/1/ntu-93-R91922053-1.pdf