Performance constraints aware voltage Islands generation in SoC floorplan design

Lu, M.-C.M.-C.LuWu, M.-C.M.-C.WuChen, H.-M.H.-M.ChenHUI-RU JIANG2020-06-112020-06-112007https://scholars.lib.ntu.edu.tw/handle/123456789/497915[SDGs]SDG7Performance constraints aware voltage Islands generation in SoC floorplan designconference paper10.1109/SOCC.2006.2838832-s2.0-43749116417https://www.scopus.com/inward/record.uri?eid=2-s2.0-43749116417&doi=10.1109%2fSOCC.2006.283883&partnerID=40&md5=55211917b1a2748e36bed2308067d302