國立臺灣大學電機工程學系Hsieh, Po-ChunPo-ChunHsieh2006-09-282018-07-062006-09-282018-07-062003-12-01http://ntur.lib.ntu.edu.tw//handle/246246/2006092815521269Low Power Issue of Asynchronous Circuits Test FIR Design - Logic circuits - Multiplier - FIR Architecture Future work Conclusion Referenceapplication/ppt1182720 bytesapplication/vnd.ms-powerpointzh-TWreporthttp://ntur.lib.ntu.edu.tw/bitstream/246246/2006092815521269/1/asyn-031201.ppt