A VLSI Design of Systolic Tree-Searched Vector Quantizer for EOS on Board SAR Processor

Fang, W. C.W. C.FangChang, C. Y.C. Y.Chang郭斯彥Nixon, R. H.R. H.NixonCurlander, J. C.J. C.CurlanderKuo, Sy-YenSy-YenKuo2009-02-042018-07-062009-02-042018-07-061989-11http://ntur.lib.ntu.edu.tw//handle/246246/121152en-USA VLSI Design of Systolic Tree-Searched Vector Quantizer for EOS on Board SAR Processorconference paper