Chun-Hong ShihYi-Hsiang LaiJIE-HONG JIANG2018-09-102018-09-102015-11http://scholars.lib.ntu.edu.tw/handle/123456789/394751[SDGs]SDG7SPOCK: Static performance analysis and deadlock verification for efficient asynchronous circuit synthesisconference paper10.1109/iccad.2015.73726032-s2.0-84964555677