Tu C.-CWang Y.-KTSUNG-HSIEN LIN2021-09-022021-09-022017https://www.scopus.com/inward/record.uri?eid=2-s2.0-85015257545&doi=10.1109%2fASSCC.2016.7844131&partnerID=40&md5=8f493fd55b3ff2318f9385a40f0375c5https://scholars.lib.ntu.edu.tw/handle/123456789/581173A sensor readout circuit employing chopped VCO-based CTDSM is presented in this paper. This VCO-based ADC features direct connection to the sensors to eliminate pre-amplifier. The VCO is designed as a Gm-CCO, which is a Gm stage cascaded with the folded-cascode current-controlled oscillator. The proposed circuit ensures a high input impedance. Furthermore, the main noise and offset contributor, the Gm stage, is mitigated by chopping operation. The VCO-based CTDSM is implemented in 40-nm CMOS. The whole circuit draws 14 μA from 1.2-V supply. With a 2.4-mVpp input, it achieves 49.43 dB SNDR over 5-kHz BW and has SFDR of 59.5 dB. The input-referred noise is 40nV/√Hz. The chip area is only 0.0145 mm2. ? 2016 IEEE.Amplifiers (electronic); CMOS integrated circuits; Readout systems; Timing circuits; Chip areas; Current-controlled oscillators; Folded-cascode; High input impedance; Sensor readout; Vco based; Variable frequency oscillators[SDGs]SDG7conference paper10.1109/ASSCC.2016.78441312-s2.0-85015257545