Hardware verification using symbolic state transition graphs

Dept. of Electr. Eng., National Taiwan Univ.Chen, Pin-hongPin-hongChenShyu, Jyuo-MinJyuo-MinShyuLIANG-GEE CHEN2007-04-192018-07-062007-04-192018-07-061993-10http://ntur.lib.ntu.edu.tw//handle/246246/2007041910032385application/pdf397113 bytesapplication/pdfen-USHardware verification using symbolic state transition graphsjournal article10.1109/ICCD.1993.393406http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910032385/1/00393406.pdf