On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform

Cheng, Chih-ChiChih-ChiChengHuang, Chao-TsungChao-TsungHuangChen, Ching-YehChing-YehChenLian, Chung-JrChung-JrLianChen, Liang-GeeLiang-GeeChen2009-02-252018-07-062009-02-252018-07-062007http://ntur.lib.ntu.edu.tw//handle/246246/141474application/pdf733302 bytesapplication/pdfen-USOn-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transformjournal articlehttp://ntur.lib.ntu.edu.tw/bitstream/246246/141474/1/62.pdf