Variation-aware core-level redundancy scheme for reliable DSP computation in multi-core systems

AN-YEU(ANDY) WUChu, W.-C.W.-C.ChuLi, H.-T.H.-T.LiChou, C.-Y.C.-Y.ChouAN-YEU(ANDY) WU2018-09-102018-09-102015http://www.scopus.com/inward/record.url?eid=2-s2.0-84958212383&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/393418Variation-aware core-level redundancy scheme for reliable DSP computation in multi-core systemsconference paper10.1109/SiPS.2015.7345008