Clock-aware placement for large-scale heterogeneous FPGAs

Kuo, Y.-C.Y.-C.KuoHuang, C.-C.C.-C.HuangChen, S.-C.S.-C.ChenChiang, C.-H.C.-H.ChiangChang, Y.-W.Y.-W.ChangKuo, S.-Y.S.-Y.Kuo2019-04-222019-04-222017https://www.scopus.com/inward/record.uri?eid=2-s2.0-85043524583&doi=10.1109%2fICCAD.2017.8203821&partnerID=40&md5=55d27fd10f9a9ba36f7a06479de4fd28https://scholars.lib.ntu.edu.tw/handle/123456789/405632Clock-aware placement for large-scale heterogeneous FPGAsconference paper10.1109/ICCAD.2017.8203821