Breakdown Behavior of 40-nm PD-SOI NMOS Device Considering STI-Induced Mechanical Stress Effect

I. S. LinV. C. SuD. ChenC. S. YehC. T. TsaiM. MaJAMES-B KUO2018-09-102018-09-102008-06https://www.scopus.com/inward/record.uri?eid=2-s2.0-44849106021&doi=10.1109%2fLED.2008.922971&partnerID=40&md5=40004d8b14bb16c18d2f958c42924b71This letter reports the shallow-trench-isolation (STI)-induced mechanical-stress-related breakdown behavior of the 40-nm PD-SOI NMOS device. As verified by the experimentally measured data and the 2-D simulation results, breakdown occurs at a higher drain voltage for the device with a smaller S/D length of 0.17 μ due to the weaker function of the parasitic bipolar device, which is offset by the stronger impact ionization in the post-pinchoff region coming from the bandgap narrowing generated by the STI-induced mechanical stress. © 2008 IEEE.[SDGs]SDG14Breakdown Behavior of 40-nm PD-SOI NMOS Device Considering STI-Induced Mechanical Stress Effectjournal article10.1109/LED.2008.9229712-s2.0-44849106021WOS:000256189000023