VLSI architecture for discrete wavelet transform based on B-spline factorization

Huang, C.-T.C.-T.HuangTseng, P.-C.P.-C.TsengChen, L.-G.L.-G.ChenLIANG-GEE CHEN2018-09-102018-09-102003http://www.scopus.com/inward/record.url?eid=2-s2.0-84943278286&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/301421VLSI architecture for discrete wavelet transform based on B-spline factorizationconference paper10.1109/SIPS.2003.1235694