Dept. of Electr. Eng., National Taiwan Univ.SHEN-IUAN LIUChang, Chen-ChiehChen-ChiehChang2007-04-192018-07-062007-04-192018-07-061997-0100135194http://ntur.lib.ntu.edu.tw//handle/246246/2007041910042549https://www.scopus.com/inward/record.uri?eid=2-s2.0-0030734470&doi=10.1049%2fel%3a19970168&partnerID=40&md5=c43d98e857a4195ddce787aa5d01e477A new CMOS four-quadrant multiplier that can operate from supply voltages of ±1.5 V is presented. This circuit was fabricated in a standard 0.8μm single-poly double-metal CMOS process. Experimental results show that the nonlinearity can be kept <2% across the entire differential input voltage range of ±0.8V. The total harmonic distortion is <2% with the differential input range up to ±0.8V. The measured -3dB bandwidth of this multiplier is ∼5MHz. It is expected to be useful in low-voltage analogue signal-processing applications.application/pdf376897 bytesapplication/pdfen-USAnalogue multipliers; CMOS integrated circuits; Multiplying circuits[SDGs]SDG7Current voltage characteristics; Electric variables measurement; Integrated circuit manufacture; MOSFET devices; Multiplying circuits; Signal processing; Time domain analysis; Analogue multipliers; Four quadrant multipliers; Total harmonic distortion; CMOS integrated circuitsjournal article10.1049/el:199701682-s2.0-0030734470http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910042549/1/00575924.pdf