A fully integrated 1.7-3.125 Gbps clock and data recovery circuit using a gated frequency detector

Rong-Jyi YangSHEN-IUAN LIU2018-09-102018-09-102005-08http://scholars.lib.ntu.edu.tw/handle/123456789/317726A fully integrated 1.7-3.125 Gbps clock and data recovery circuit using a gated frequency detectorjournal article10.1093/ietele/e88-c.8.17262-s2.0-26044482485WOS:000231440300032