Dept. of Electr. Eng., National Taiwan Univ.Kao, Ling-ChihLing-ChihKaoZSEHONG TSAI2007-04-192018-07-062007-04-192018-07-062002-0505361486https://www.scopus.com/inward/record.uri?eid=2-s2.0-0036282982&doi=10.1109%2fICC.2002.997006&partnerID=40&md5=580fbaa83376798aa29ca3aa3d9bc153The performance of a GMPLS switching architecture with the flush capability is studied. For this switching architecture, we propose a queueing model that includes the control plane, the switching buffer mechanism, and the flush mechanism. The flush capability is included to reduce the out-of-sequence problem due to dynamic path changes. The behavior of aggregated streams, the label-setup and release policies, and the mechanisms for efficient resource allocation are all covered. With the proposed model, one can select appropriate parameters for the label-setup policy and the label-release policy to match the traffic load and network environment. Key performance metrics, such as the throughput, the label-setup rate, and the fast path bandwidth utilization, can all be evaluated by this mathematical model. Numerical results and simulations are used to verify the accuracy of our proposed queueing model. Finally, the trade-off among these performance metrics can be observed as well.application/pdf319884 bytesapplication/pdfen-USGMPLS; Performance analysis; Routing; Switching[SDGs]SDG8Bandwidth; Buffer storage; Computer simulation; Electric network topology; Mathematical models; Network protocols; Packet networks; Queueing networks; Queueing theory; Resource allocation; Switching systems; Telecommunication traffic; Generalized multi-protocol lamda switching (GMPLS); Packet switchingPerformance analysis of a generic GMPLS switching architecture with flush capabilityjournal article10.1109/ICC.2002.9970062-s2.0-0036282982http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021186/1/00997006.pdf