Function of the Upper/Lower Parasitic BJTs in 40nm PD SOI NMOS Device due to the Back-Gate Bias Effect

A. P. ChuangS. I. SuZ. H. YangJ. B. KuoD. ChenC. S. YehJAMES-B KUO2018-09-102018-09-102013-01http://scholars.lib.ntu.edu.tw/handle/123456789/381392Function of the Upper/Lower Parasitic BJTs in 40nm PD SOI NMOS Device due to the Back-Gate Bias Effectconference paper