張帆人臺灣大學：電機工程學研究所何秉道Ho, Ping-TaoPing-TaoHo2007-11-262018-07-062007-11-262018-07-062006http://ntur.lib.ntu.edu.tw//handle/246246/53598全球定位系統結合分碼多工擷取的技術與三角定位法來判斷接收機的精確位置。其接收機的解調變功能，大多均能夠依賴軟體來完成。本論文概述GPS軟體接收機的主要架構，軟體接收機可以使得系統架構更具有彈性及變通性，因為它只更動軟體程式碼的部份，相對於硬體實現要容易得多。 本研究的目的在於設計及分析追蹤演算法的部份。首先提出來的是軟體化的相關函數訊號處理，藉著特別的乘法與加法的運算處理，可加快訊號處理的速度以降低程式的執行時間。另外，在載波追蹤迴路裡，研究成果包括：迴路鑑別器所需的反正切函數的近似法以及輔助追蹤迴路用來追蹤較大幅度的都卜勒頻率。 除此之外，鎖相位迴路藉著動態變動的增益控制器可得到較好的暫態響應，另外融合並應用換檔演算法，更可使得載波追蹤迴路的鎖定訊號的時間比起傳統鎖相位迴路快了大約26%，最後，利用真實的衛星訊號當作模擬追蹤系統的輸入，以完成驗證工作。GPS system combines CDMA technology and trilateration method to get the precise positions of the receivers. Most function of a GPS receiver could be implemented in software. This thesis outlines the main topics of a GPS software receiver which makes the system highly flexible when different algorithms should be tested. The main intention here is in design and analysis of the tracking algorithms in GPS software receiver. In the beginning, a software parallel correlation is presented to enhance the speed of signal processing which can reduce the execution time. Also, efforts on the carrier tracking loops are derived including a new ATAN approximation of the carrier loop discriminator and some algorithms applied in the carrier tracking loop to track the larger Doppler frequency offset. A loop controller design method for digital phase locked loop (DPLL) is presented. DPLL with dynamic gain control technique is implemented such that a better performance of transient response is acquired. Additionally, Gear-shifting algorithm is also applied to make the speed of the carrier tracking much faster in about 26% in comparison with the conventional one. Finally, the thorough system simulations are performed so as to accomplish the job of verification.Chapter 1 Introducation 1 1.1 Motivation 1 1.2 Scope in System Architecture of Research 2 1.3 Thesis Organization 3 Chapter 2 GPS Receiver Characterization 4 2.1 GPS Signal Structure 4 2.2 GPS Receiver Architecture 6 2.3 I-Q Demodulation 9 2.4 Coarse Acquisition Code Generation 11 2.5 Bit-Wise Alogorithm for Software Correlation 14 2.6 8-Bit Data Parallel processing 19 Chapter 3 Software Receiver Tracking Algorithm 23 3.1 Carrier Tracking Loop 24 3.1.1 Costas Phase Locked Loop 25 3.1.2 ATAN Phase Discriminator 27 3.1.3 Math Model of PLL in S-Domian 31 3.1.4 Math Model of PLL in Z-Domain 33 3.2 Pull-In Process 34 3.2.1 Frequency Locked Loop 35 3.2.2 FLL-Assisted-PLL Carrier Tracking Loop 38 3.3 Code Tracking Loop 40 3.3.1 Delay Locked Loop 40 2.3.2 Carrier-Aided-Code DLL 43 3.4 Lock Detection 45 3.5 Simulation Result 47 Chapter 4 Digital PLL with Dynamic Gain Control Technique53 4.1 Linear Analysis of Conventional DPLL 54 4.2 Nonlinear Analysis of Conventional DPLL 56 4.3 Modified Gain Controlled DPLL 58 4.3.1 First-Order MDPLL 59 4.3.2 Second-Order MDPLL 62 4.4 Gear-Shifting Gain Control Algorithm 64 4.5 Simulation Result with Dynamic Gain Controlled DPLL 67 Chapter 5 Conclusion and Future Work 75 5.1 Concluding Remarks 75 5.2 Future Work 76 5.3 Acknowledgement 77 Appendix 78 Bibliography 79997946 bytesapplication/pdfen-US衛星定位軟體接收機追蹤迴路鎖相迴路GPSSoftware ReceiverTrackingPLLthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/53598/1/ntu-95-R93921074-1.pdf