Substrate-Bias Optimized 0.18um 2.5 GHz 32-bit adder with Post-Manufacture Tunable Clock

Qi-Wei KuoVikas SharmaCHUNG-PING CHEN2018-09-102018-09-102005-04http://scholars.lib.ntu.edu.tw/handle/123456789/318046Substrate-Bias Optimized 0.18um 2.5 GHz 32-bit adder with Post-Manufacture Tunable Clockconference paper10.1109/VDAT.2005.1500091